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CS210 Computer Systems and Architecture | 2015 Past Paper Solutions | The University of Strathclyde

1 (a) MIPS is a popular metric for rating the performance of a computer. In this context what does MIPS mean? (1 mark)

Answer (Purchase past paper to get access to the full solution)

MIPS – Million Instructions Per Second

(b) The types of MIPS ratings include: (i) Native MIPS (ii) Peak MIPS Explain how each type is calculated and what their drawbacks may be. (6 marks)

(c) According to Patterson and Hennessy a common pitfall in computer design is: “Failure to consider instruction set design can adversely affect pipelining.” Give three examples of computer design features that best illustrate this pitfall. (3 marks)

Answer (Purchase past paper to get access to the full solution)

• Widely variable instruction lengths and running times

cause imbalance of stages
complicate hazard detection
complicate maintenance of precise interrupts

• Sophisticated addressing modes

complicate hazard detection
multiple memory accesses per cycle complicate control
multiple memory accesses per cycle cause bubbles

(d) A derivation of MIPS used by a RISC research team at Stanford – some of whom went on to found the MIPS Company – was Microprocessor [without] Interlocked Pipeline Stages. This approach traded off simplicity in the hardware with complexity in the compiler and assembler for the machine. Highlight two issues that the compiler and/or the assembler would need to deal with in order to overcome the problems inherent in a non-interlocked pipeline. Give two examples of the software techniques used to overcome these problems. (4 marks)

Answer (Purchase past paper to get access to the full solution)

Predict Not Taken: Always fetch the instruction after the branch from the instruction
cache, but only execute it if the branch is not taken. If the branch is not taken, the
pipeline stays full. If the branch is taken, the instruction is flushed (marked as if it
were a NOP), and one cycle's opportunity to finish an instruction is lost.

Branch Likely: Always fetch the instruction after the branch from the instruction
cache, but only execute it if the branch was taken. The compiler can always fill the
branch delay slot on such a branch, and since branches are more often taken than
not, such branches have a smaller IPC penalty than the previous kind.

Branch Delay Slot: Always fetch the instruction after the branch from the instruction
cache, and always execute it, even if the branch is taken. Instead of taking an IPC
penalty for some fraction of branches either taken (perhaps 60%) or not taken
(perhaps 40%), branch delay slots take an IPC penalty for those branches into which
the compiler could not schedule the branch delay slot. The SPARC, MIPS, and
MC88K designers designed a branch delay slot into their ISAs.

(e) Modern processor implementations now have hardware support to detect and circumvent the problems arising from pipelined datapaths. Describe two examples of the hardware techniques used to overcome these problems. (6 marks)

Answer (Purchase past paper to get access to the full solution)

Structural Hazards occur when different instructions collide while trying to access
the same piece of hardware in the same segment of a pipeline. This type of hazard
Page 3 of 9 can be alleviated by having redundant hardware for the segments wherein the
collision occurs. Occasionally, it is possible to insert stalls or reorder instructions to
omit this type of hazard.

Data Hazards occur when an instruction depends on the result of a previous
instruction still in the pipeline, which result has not yet been computed. The simplest
remedy inserts stalls in the execution sequence, which reduces the pipeline's
efficiency. The solution to data dependencies is twofold. First, one can forward the
ALU result to the writeback or data fetch stages. Second, in selected instances, it is
possible to restructure the code to eliminate some data dependencies.

Control Hazards can result from branch instructions. Here, the branch target
address might not be ready in time for the branch to be taken, which results in stalls
(dead segments) in the pipeline that have to be inserted as local wait events, until
processing can resume after the branch target is executed. Control hazards can be
mitigated through accurate branch prediction (which is difficult), and by delayed
branch strategies.

2 (a) Given the following declarations in a C program: static char h[] = {'H','e','l','l','o'}; static char w[10] = "world"; char *p = "Hello world"; i. Show, with the aid of suitably commented C statements, how an element of the array h could be accessed through pointer p. (2 marks)

ii. State what is meant by the term scaling when used in the context of accessing array elements through pointers. (1 mark)

iii. However, it is not generally necessary to have a separate pointer to an array to use pointer arithmetic to access array elements. What is the special feature of C that allows this? Use this feature to complete the equivalence: h[n] is the same as ... (2 marks)

(b) i. Explain what is meant by the term format string in the context of a printf() function. (2 marks)

ii. How does such a format string enable a printf() function to handle the variable number of arguments that may be passed into it? Use the following C statements as examples in your answer showing what you would expect, given the declarations in part (a), to be the printed result from each: printf("%5s, this is the BBC %s service",h,w); printf("%s, this is the BBC %s service",p,"%s-wide",p+7); (4 marks)

(c) i. With the aid of examples, state several advantages of using typedef declarations in a C program. (2 marks)

ii. Compare and contrast the use of a #define ‘equivalent’ of a typedef and give an example of a subtle programming ‘bug’ that might arise when using a #define rather than a typedef. (2 marks)

(d) Write a version of the C function reversePrint() as specified below along with a simple C program to test it out. (5 marks) Syntax void reversePrint(char *s) Description Takes a string, and prints the characters in reverse order. The original string is unaffected. Example reversePrint("pots") will print the character string "stop".

3 (a) What are the differences between a trap and an interrupt? Can traps be generated intentionally by a user program? If so, for what purpose? (2 marks)

(b) What is the main idea behind the modular approach to operating system design? What are the similarities and differences between the modular approach and the layered and microkernel approaches? (6 marks)

(c) Compare the main memory organization schemes of contiguousmemory allocation, pure segmentation, and pure paging with respect to the following issues: 

external fragmentation

internal fragmentation

ability to share code across processes

 (6 marks)

(d) Consider the following page reference string: 1, 2, 3, 4, 2, 1, 5, 6, 2, 1, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6. How many page faults would occur for the following replacement algorithms, assuming four frames? Note that all frames are initially empty. 

Least Recently Used (LRU) replacement

First In First Out (FIFO) replacement

Optimal replacement

Your answer should clearly demonstrate the various steps of the calculation, not just the final number of page faults. (6 marks)

4 (a) Discuss briefly the prime motivation for the Internet Engineering Task Force to begin the effort of developing a successor to the IPv4 protocol. (2 marks)

(b) The result of the IETF effort mentioned in part (a) above was the specification of IPv6. Identify four of the most important changes introduced in IPv6 and outline the major reason for each change. (8 marks)

(c) Describe briefly the chain of events that occur when Alice types the URL for www.google.com into her web browser and that will eventually result in Google’s home page being displayed. Your answer should concentrate on the protocols that are used prior to the sending of the HTTP GET message to www.google.com. (6 marks) 

(d) With reference to the following Telnet session transcript give an explanation of the HTTP protocol:

$ telnet www.cis.strath.ac.uk

(4 marks)

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Last updated: Sep 30, 2019 06:21 AM